Caroller
10-29 18:11

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  • PamelaOng
    ·10-30 08:26
    Yes—but mainly as a medium-term constraint on TSMC’s pricing power, not an immediate break in it. Intel’s EMIB-T is becoming a credible alternative for very large, HBM-heavy AI packages, particularly among custom-ASIC customers that value supply diversification and lower package cost. But it has not yet demonstrated the high-volume, multi-customer execution needed to displace TSMC’s entrenched CoWoS ecosystem.


    Why EMIB-T matters


    EMIB-T uses localized silicon bridges with TSV-based vertical power delivery, rather than a large full-package silicon interposer. Its potential advantages are package-size scalability, power delivery, and silicon efficiency for extremely large designs.
    Intel has disclosed technical progress toward 25µm interconnect pitch and packages up to 120×120mm, aimed at HBM4e-era accelerators. This is technically relevant where power integrity and package area become the bottleneck, not just interconnect density.
    Xueqiu
    Xueqiu
    The economic threat is strongest if Intel
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